About Steve Pytel

Dr. Steven Gary Pytel Jr. is the Electronics Product Manager. He received a Doctor of Philosophy specializing in signal integrity from the University of South Carolina. He previously worked at Intel Corporation as a Senior Signal Integrity and Hardware Design Engineer where he helped design Blade, Telecom, and Enterprise servers. His current research interests include high speed serial signaling, power delivery network impact on memory busses, electro-thermal interactions for 3DIC packaging and hybrid electromagnetic field solvers. He has over 30 publications along with several invited papers and presentations.

Chip-Package-System Workflow Breaks Down the Barriers in Electronics Design

Chip-Package-System Workflow Engineers are challenged to design modern electronic systems that operate at higher speeds with lower power with ever greater functionality in an ever shrinking footprint. These design challenges drive engineers to perform Chip-Package-System (CPS) co-design and analysis. However, the design flow is often unconnected, and design data is exchanged manually leading to slow design times and error prone design methodologies. ANSYS 18 breaks down the barriers between simulation domains and delivers a Chip-Package-System workflow that enables engineers to accomplish their work in a rapid and convenient way. Continue reading