Modern high-tech products using chips that are designed with the latest deep sub-micron process technologies (28nm and below) and FinFET technology offer higher performance, smaller footprint and lower power. However, power integrity analysis and reliability challenges become increasingly complex for chip package designs using these devices.
More stringent manufacturing rules present basic layout challenges and new design innovations require careful consideration of effects such as electromigration (EM), electrostatic discharge (ESD) and noise coupling through substrate, signal and power rails. Even the most thorough sign-off process can often fail to prevent tape-out hurdles or extensive redesign. Therefore, forward-thinking design teams need to address reliability and power integrity long before final sign-off, accounting for their impact during the design process itself. Continue reading →
I enjoy working on every article I coordinate for ANSYS Advantage magazine. I always learn something new while assisting ANSYS customers and staff tell their stories of excellence in engineering simulation. I have no favorites as I appreciate all of the articles. But, I decided to let our readers choose their top five, based on the power of downloading. The following are the most-read articles from the four issues (three regular issues and one special issue for oil and gas) of ANSYS Advantage published last year. All these stories have one thing in common: They feature robust and reliable design practices. Drumroll please …
Electric motors and generators produce vibrations and noise associated with many physical mechanisms. It’s always been of great interest to look at the vibrations and noise produced by the transient electromagnetic forces on the stator of a permanent magnet motor. Thanks to our products that made is possible through a direct coupling between ANSYS Maxwell and ANSYS Mechanical. The process of this coupling is to first carry out an electromagnetic simulation to calculate the forces per tooth segment of the stator. The harmonic orders of the electromagnetic forces are then calculated using Fourier analysis, and forces are mapped to the mechanical harmonic analysis of the second stage. As you might expect, a simulation environment — ANSYS Workbench— is used to integrate a seamless workflow. Continue reading →
When we think of “mobile devices”, images of smartphones and tablets come to mind. These devices connect us virtually to events around the world, our family, our friends, and the global marketplace, without ever leaving our homes. And with the advancements in automotive electronics, our driving experiences can also be enhanced, where we are as globally connected to our environment as our smart phones. Such connectivity could augment our driving experience and enhance our security, by providing early warning and accident avoidance capabilities. Imagine cars being aware, not just of the surroundings but also aware of their driver. Imagine a future where your interface to the virtual word is limited not to queries on a touch screen, but rather the entire environment of your car, from the windshield to the seat to the car electronics, which are all engineered to provide a globally connected driving experience unique to you. Continue reading →
Today, I’m pleased to announce the launch of ANSYS Redhawk 2014. RedHawk was the industry’s first foundry-certified, full-chip sign-off solution for power noise and reliability. Over the past 10 years, its accuracy, performance and scalability benefits have enabled thousands of successful designs to make it into production by all major semiconductor companies. The newest version of the software will help to ensure that RedHawk continues to be a technology leader and solution of choice for chip designers around the world. Continue reading →
Power noise integrity challenges designers face in FinFET-based design
Recently, there has been a lot of talk around designing systems-on-chips (SoCs) using FinFET technology. So what is a FinFET and what’s all the noise about? Simply put, FinFET is a three-dimensional field-effect transistor (FET) where the gate is wrapped around an elevated channel, creating a “fin”. Compared to traditional planar MOS transistors, FinFET architecture offers reduced leakage power and increased drive current, resulting in lower power, higher performance SoCs for mobile, networking, computing, and other applications. Continue reading →
Hardly a day goes by when we don’t hear about the upcoming revolution in wearable devices or the Internet of Things (IoT). The $3.2B acquisition of Nest® by Google clearly got noticed by all of us. But, the Nest thermostat is just one example of connected devices that are poised to change our lives over the coming years. The Nike FuelBand® and Fitbit® have already been helping us shape up for some time. Continue reading →
Today, we announced that our ANSYS HFSS users can reduce design time and cost, while optimizing complete electronic system performance, thanks to linear circuit simulation embedded within the latest version of this software.
At a high level, a more streamlined simulation workflow enables engineers to focus on enhancing complete system reliability and signal quality as well as analyzing electromagnetic interference. New HFSS product options for radio frequency (RF) and signal integrity (SI) analyses are also available — making high-frequency (HF) and high-speed electronic device design even more comprehensive. Continue reading →