NVIDIA recently announced its ultra high-end Quadro GP100 graphics card in February. Comparing to previous generations of Quadro cards, the new card runs much faster and is more power efficient. The new GP100 GPU has 3,584 CUDA cores, which deliver 10.6 and 5.3 teraflops floating point performances for single- and double-precision, respectively.
The GPU is also equipped with 16 GB HBM2 (the 2nd generation high-bandwidth memory) which allows data to be transferred at a lightning fast speed of 720 GB/sec. Both factors enhance the performance for running the most demanding transient electromagnetic simulation.
As digital electronic devices continue to shrink and put greater functionality within consumer and enterprise products, thermal management continues to grow as the bottle neck for defining next generation architectures. Significant challenges exist today because the heat being generated continues to rise while the thermal envelope remains constant for silicon devices.
While some switching power converters have moved to III-V semiconductor materials such as GaN, the overall system still contains many silicon semiconductor devices that must meet traditional thermal envelopes. The removal of this heat has become a critical aspect of the design process, often being a very significant driver of what can be delivered within an electronic product. Continue reading →
As you can imagine, there are many conversations at ANSYS centered around the simulation industry and current engineering trends. Sometimes during the conversations with my colleagues that handle the microwave and RF communication and signal and power integrity sectors of our business, I get the feeling that electromechanical design and power electronics is boring. Why do we want to talk about simulation of devices that have been around for a century like electric motors and transformers? Continue reading →
Engineers are challenged to design modern electronic systems that operate at higher speeds with lower power with ever greater functionality in an ever shrinking footprint. These design challenges drive engineers to perform Chip-Package-System (CPS) co-design and analysis. However, the design flow is often unconnected, and design data is exchanged manually leading to slow design times and error prone design methodologies. ANSYS 18 breaks down the barriers between simulation domains and delivers a Chip-Package-System workflow that enables engineers to accomplish their work in a rapid and convenient way. Continue reading →
ANSYS HFSS users are constantly telling me, “Wow, I didn’t know HFSS could do that!” I guess I shouldn’t be surprised — our software development and product management teams have been working tirelessly over the last few years to integrate ever more valuable features into HFSS to deliver a product worthy of its well-deserved reputation as “the gold standard.” Focusing on automated simulation and design workflows for antennas and high speed electronics, ANSYS HFSS 18 will help you achieve the increasing requirements for wireless connectivity, thermal performance and power efficiency within shorter design schedules. Continue reading →
The concept of the “automated home and smart home” was first introduced over 80 years ago, and has been facing different technical limitations since then.
Recently, service providers and home appliance manufacturers have launched a new initiative to bring the concept of smart homes to reality allowing subscribers to remotely manage and monitor different home devices from anywhere via smart phones or over the web with no physical distance limitations. Continue reading →
Many of our customers are reaping the benefits of the trace import functionality in ANSYS Mechanical, which accounts for the effects of copper distribution on every layer of a printed circuit board (PCB) — or printed circuit board assembled (PBA) — for your thermal stress analysis, modal, shock and random vibration simulations. Just think — you can capture the accuracy necessary to confidently make engineering decisions in a fraction of the time you are currently spending on lumped parameter models. In this post, I’ll give you a brief overview and explanation of the process. Continue reading →
For engineers designing integrated circuits (IC) including system on chips (SoC), using integration and miniaturization to increase performance and bandwidth while reducing power and footprint has been an ongoing, continuous strategy. Now TSMC has developed an InFO packaging technology that is truly a game changer!
Why is InFO technology a game changer?
As mobile phones and other handheld devices continue to be a key driver of semiconductor innovation, chips often go into systems that demand a small footprint and minimum height. Since wiring dimensions of a chip are much smaller than that on a board, a chip cannot be mounted directly on a board. Continue reading →
Throughout my 25 years in the computer-aided engineering industry, some of the smartest people I know have told me that you can’t use simulation to design planar magnetic transformers. Is it true? No! What they’re really saying is that there isn’t an effective way to simulate the devices to predict the full behavior — which includes electromagnetic losses, harmonic content, EM-thermal coupling and ultimately how the electromagnetic fields and temperature affect the circuit — in a reasonable amount of time for simulation to be an effective design tool. Continue reading →
Antennas are the lifeblood of connected, mobile and many emerging IoT products. Consumers expect a reliable connection every time; anything short can kill a product launch or, worse yet, tarnish a corporate brand. That’s the market reality. The engineering reality is that there are significant engineering challenges associated with designing antennas and radio systems, including providing reliable connectivity and maintaining reasonable performance within an ever shrinking design footprint. Many of today’s devices need to operate in an increasingly crowded radio spectrum with the possibility of co-site conditions, operation near the human body and other challenging installed environments. Continue reading →