As designs increase in complexity to cater to the insatiable need for more compute power spurred by different AI applications ranging from data centers to self-driving cars, designers are constantly faced with the challenge of meeting the elusive PPA (Power Performance and Area) targets.
PPA over-design has repercussions resulting in increased product cost as well as potential missed schedules with no guarantee of product success. Advanced SoCs pack more functionality and performance which result in higher power density. Traditional approaches of uniformly over-designing the power grid which has worked in the past is no longer an option with routing resources becoming severely constrained. To add to these woes, there are hundreds of combinations of PVT corners to solve for along with the increasing number of applications. Continue reading →
When one of my friends asked me on Saturday night what I like about my job, I started off by saying that “there is never a dull moment in high-performance computing. The computing landscape is constantly changing, the HPC ecosystem collaborations are so numerous and intriguing, and the strategic/economic value of HPC for simulation has never been greater” (or: relevance of HPC for organizations to become more competitive is so compelling).
All of this was very evident at last week’s ISC conference — one of world’s largest high-performance computing events — drawing this year over 2,800 attendees from 56 countries. Let me share with you a few exciting HPC trends observed during this conference.